Merge pull request #520 from vikramkanigiri/vk/scp_flexibility

Vk/scp flexibility

diff --cc include/plat/arm/css/common/css_def.h
Simple merge

diff --cc plat/arm/board/juno/include/platform_def.h
index 99de7617b8ebc94ca0cb9200b757e1da0b4c7e18,0cffbe827017e8f4dc9de2bfc16b59f3d405494e..deac0fffdd7a1c03c9594c1cf75bfc52eb92b066
--- 1/plat/arm/board/juno/include/platform_def.h
--- 2/plat/arm/board/juno/include/platform_def.h
+++ b/plat/arm/board/juno/include/platform_def.h
@@@ -103,9 -99,20 +103,23 @@@
  #define PLAT_ARM_GICH_BASE            0x2c04f000
  #define PLAT_ARM_GICV_BASE            0x2c06f000
  
 +/* MHU related constants */
 +#define PLAT_CSS_MHU_BASE             0x2b1f0000
 +
+ /*
+  * Base address of the first memory region used for communication between AP
+  * and SCP. Used by the BOM and SCPI protocols.
+  *
+  * Note that this is located at the same address as SCP_BOOT_CFG_ADDR, which
+  * means the SCP/AP configuration data gets overwritten when the AP initiates
+  * communication with the SCP. The configuration data is expected to be a
+  * 32-bit word on all CSS platforms. On Juno, part of this configuration is
+  * which CPU is the primary, according to the shift and mask definitions below.
+  */
+ #define PLAT_CSS_SCP_COM_SHARED_MEM_BASE      (ARM_TRUSTED_SRAM_BASE + 0x80)
+ #define PLAT_CSS_PRIMARY_CPU_SHIFT            8
+ #define PLAT_CSS_PRIMARY_CPU_BIT_WIDTH                4
+ 
  /*
   * Define a list of Group 1 Secure and Group 0 interrupts as per GICv3
   * terminology. On a GICv2 system or mode, the lists will be merged and treated